The present invention generally relates to routing methods and routing systems, and more particularly to a routing method and a routing system for a switching system having a plurality of paths.
For example, in order to freely transfer files at a high speed, it is necessary to use a high-speed broadband communication network. In such a communication network, the communication band must be several tens of Mbits/s or greater which is extremely large compared to a communication band for telephones and data communications which is in the range of 64 kbits/s.times.n. Recently, there is active research in this field of broadband communication, and the asynchronous transfer mode (ATM) communication is regarded as an effective method of communication.
The ATM communication technique is proposed in Kawarasaki et al., "Perspective of ATM Communication Technique,--Evolution of Broadband Communication Network", Journal of Electronic Information Communication Society, Vol.71, No.8, Aug. 1988, pp.806-814. According to the ATM communication, digitized information such as audio, data and video information are divided into blocks which have a fixed length and are called cells. The ATM is a label multiplexing in which each cell is transmitted with a destination information which is added to a header of the cell and a channel is identified from a label within the header. In the ATM, the occurrence of the cells is based on an information transmission request and is asynchronous. Hence, the ATM is different from a synchronous transfer mode (STM) which is a time position multiplexing in which a channel is identified from a time position of a time slot within a frame. In the STM, the time slot occurs periodically regardless of the existence of information transmission.
The ATM transmits the information after converting the information into a unified format, that is, cells. The header of the cell must include channel identification, routing information and the like. The routing information indicates which route is to be taken within an ATM switching system. The ATM switching system directs the cell to a desired output port by selecting connections of each of unit switches based on the routing information which is added to the header of the cell.
FIG.1 shows an example of an ATM switching system having 3 stages of self routing modules (SRMs), where each SRM has N input links and N output links. For example, a route within the ATM switching system is switched during communication, and FIG.1 shows a case where a route "a" indicated by a one-dot chain line is switched to a route "b" indicated by a phantom line. When a fault occurs in a certain route or a congestion occurs in a local part within the switching system, it is necessary to switch the route to a route which still has margin in its capacity. The congestion is caused by an inappropriate call accept control logic and when a user inputs a number of cells exceeding a declared value, and in the latter case, the cells input exceeding the declared value are disposed, for example.
When the route is simply switched, the cell which is transferred through the new route after the switching of the route may go ahead of the cell which is transferred through the old route before the switching of the route. In other words, since the new route after the switching of the route is free compared to the old route, the cell sequence is disordered at the output end of the ATM switching system. When the cell sequence is disordered, it is no longer possible to carry out a positive signal processing. Hence, when switching the route, it is necessary to take measures to prevent the cell which is transferred through the new route after the switching of the route from going ahead of the cell which is transferred through the old route before the switching of the route.
Conventionally, virtual channel identification (VCI) converters 2.sub.1 and 2.sub.2 shown in FIG.2 which are provided in a stage preceding an ATM switching system 1 having the structure shown in FIG.1 have buffering functions so as to prevent the cell which is transferred through the new route after the switching of the route from going ahead of the cell which is transferred through the old route before the switching of the route.
Each cell has a VCI number added to an ATM header thereof, and cells having various VCI numbers are transmitted time sequentially. A VCI discriminator 3 shown in FIG.2 discriminates the VCI number of each cell, and a reference is made to a VCI table 4 so as to obtain via selectors 5a and 5b those cells having the VCI numbers which are to be processed. In other words, when a route switching instruction is received from a central processing unit (CPU) 6, those cells which have predetermined VCI numbers and are to take the new route within the ATM switching system 1 are temporarily stored in a first-in-first-out (FIFO) memory 7 by the switching of the selectors 5a and 5b, while those cells which are to take the old route within the ATM switching system 1 are passed as they are by the switching of the selectors 5a and 5b. The cells which are to take the new route and are stored in the FIFO memory 7 are read out after a predetermined time which is preset by a timer 8. This predetermined time corresponds to a maximum tolerable delay time within the ATM switching system 1 such that the cell which is transferred through the new route after the switching of the route is prevented from going ahead of the cell which is transferred through the old route before the switching of the route.
When switching the route in the conventional system shown in FIG.2, the cells which are to take the new route within the ATM switching system 1 are temporarily stored in the VCI converter 2.sub.2 which is provided in the stage preceding the ATM switching system 1 and are read out and input to the ATM switching system 1 after the predetermined time which is preset by the timer 8 within the VCI converter 2.sub.2. In other words, the cells which are to take the new route must wait before being subjected to the switching process in the ATM switching system 1. For this reason, a long delay time is introduced between the cells having the various VCI numbers, and there is a problem in that a subsequent signal processing cannot be carried out efficiently within a short time because of the delay introduced at the input stage of the ATM switching system 1.